DSP ASIC Design Staff Engineer

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Overview

SigmaSense is developing state-of-the-art touch controller ASICs using its breakthrough sensing technology that makes extensive use of digital signal processing techniques. We are seeking a key DSP ASIC Design Staff Engineer for architecting and designing the DSP modules of our next-generation chips. Must have a strong background and recent hands-on experience with design of major DSP functions in ASICs.

Responsibilities

  • Use your DSP and ASIC design expertise to architect, design, implement, and verify the DSP and digital blocks for the ASIC.
  • Work closely with our DSP algorithm and system experts to define and develop DSP modules for implementation in our ASICs.
  • Implement your DSP functions in Verilog and perform block-level verification.
  • Work with analog design engineers to Integrate and interface with high-performance analog sensing and signal processing circuits to achieve high SNR and low power.
  • Work with verification engineers to establish effective verification strategies, test plans, and participate in fully verifying chip DSP functions.
  • Participate in all aspects of full ASIC design activities including definition, architectures, DSP design, digital logic design, verification, and validation of DSP functions of the chip in the lab.
  • Participate actively with other ASIC team members in debugging any design issues.
  • Document your design and participate in cross-functional design reviews to ensure quality delivery of DSP functional blocks and its integration in the full ASIC.

Qualifications

  • 10 years experience in DSP IC design.
  • Must have a good understanding of DSP algorithms and DSP system specifications with expertise in mapping them to ASIC design.
  • Experience in micro-architecture design, RTL coding in Verilog/System Verilog, and functional verification at the block and DSP module level is required.
  • Must be able to make trade-off analysis between area, performance, and power of DSP blocks in conjunction with rest of the chip.
  • Well-versed with ASIC design flow and proficient in using ASIC design and verification tools.
  • Must have good understanding of synchronous/asynchronous design and timing requirements for complex DSP modules.
  • Ability to understand and code in C/C++ and Matlab is highly desirable.
  • Has good communication skills and teamwork personality.
  • Must have a BS in EE or equivalent, MS in EE with specialization in DSP preferred.
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